Integral INMPCIE16G50SXE Arkusz Danych

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Strona 2

10 PIO timing parameters Mode 0 ns Mode 1 ns Mode2 ns Mode 3 ns Mode 4 ns Note t0 Cycle time (min) 600 383 240 180 120 1,4 t1

Strona 3 - TABLE OF CONTENTS

11 negated at the time tA after the activation of DIOR- or DIOW-, then tRD shall be met and t5 is not applicable. 4. Mode may be selected at th

Strona 4 - 1.1 Capacity Specification

12 3.3.2 Multiword DMA Data Transfer (Initialing a Multiword DMA data burst) (Sustaining a Multiword DMA data burst)

Strona 5 - 2.1 Pin Assignments

13 (Device terminating a Multiword DMA data burst) (Host terminating a Multiword DMA data burst)

Strona 6 - 2.2 Pin Description

14 Multiword DMA timing parameters Mode 0 ns Mode 1 ns Mode2 ns Note t0 Cycle time (min) 480 150

Strona 7

15 3.3.3 Ultra DMA Data Transfer Ultra DMA data burst timing requirements

Strona 8 - 3.1 Absolute Maximum Rating

16 Ultra DMA data burst timing descriptions

Strona 9 - 3.3 AC Characteristics

17 (Initialing an Ultra DMA data-in burst) (Sustained Ultra DMA data-in burst)

Strona 10

18 (Device terminating an Ultra DMA data-in burst) (Host terminating an Ultra DMA data-in burst)

Strona 11

19 (Initialing an Ultra DMA data-out data burst) (Sustained Ultra DMA data-out burst)

Strona 12

2 Features:  Standard ATA/IDE Bus Interface - 512 Bytes / Sector - ATA command set compatible - Selectable Master/Slave Setting  C

Strona 13

20 (Host terminating an Ultra DMA data-out burst) (Device terminating an Ultra DMA data-out burst)

Strona 14

21 3.4 Power Management System Power Consumption: (Ta = 0 to 700C) Symbol Parameter Conditions

Strona 15

22 4.2 Command Sets Below table summarizes the PATA MINI PCIE command set with the paragraphs that follow describing the individual commands and

Strona 16

23 4.3 Identify Drive Information The Identity Drive Command enables Host to receive parameter information from the device. The parameter words i

Strona 17

24 Word Address Default Value Total Bytes Data Field Type Information 57-58 Nnnnh 4 Current capacity in sectors (LBAs)(Word 57= LSW, Word 58= MSW)

Strona 18

25 5.0 Physical Dimension Top View Side & Bottom View Note: 1. Unit: mm General Tolerance: ± 0.1 6.0 Weight 1)

Strona 19

3 TABLE OF CONTENTS 1.0 BLOCK DIAGRAM ...

Strona 20

4 1.0 Block Diagram 1.1 Capacity Specification Density Total Bytes Cylinders Heads Sectors 16GB 16,441,270,272 16383 16 63 32GB 32,279,224,3

Strona 21 - 4.0 Software Interface

5 2.0 Specification 2.1 Pin Assignments Pin Number Signal Pin Number Signal 1 HD0 2 HD15 3 HD1 4 GND 5 HD2 6 HD14 7 HD3 8 HD13 9 GND 10 HD1

Strona 22 - 4.2 Command Sets

6 29 GND 30 nDMACK 31 NC 32 DMARQ 33 NC 34 GND 35 GND 36 NC 37 HA0 38 NC 39 HA1 40 GND 41 HA2 42 IORDY 43 nIOIS16 44 INTRQ 45 nPDIAG 46 nHCS0 47 3

Strona 23

7 DSTROBE(UDMA data strobe) When UDMA mode DMA Read is active, this signal is the data-in strobe generated by the device. 26 CSEL(Cable select) I

Strona 24

8 “O” An output from the device to the host system. “I/O” An input/output(bi-direction) common. “P” Power supply. 3.0 Electrical

Strona 25 - 6.0 Weight

9 3.3 AC Characteristics 3.3.1 PIO Data Transfer

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