Integral INPCIE32G70MXB Arkusz Danych

10 PIO timing parameters Mode 0 ns Mode 1 ns Mode2 ns Mode 3 ns Mode 4 ns Note t0 Cycle time (min) 600 383 240 180 120 1,4 t1 Ad

11 negated at the time tA after the activation of DIOR- or DIOW-, then tRD shall be met and t5 is not applicable. 4. Mode may be selected at the

12 3.3.2 Multiword DMA Data Transfer (Initialing a Multiword DMA data burst) (Sustaining a Multiword DMA data burst)

13 (Device terminating a Multiword DMA data burst) (Host terminating a Multiword DMA data burst)

14 Multiword DMA timing parameters Mode 0 ns Mode 1 ns Mode2 ns Note t0 Cycle time (min) 480 150 1

15 3.3.3 Ultra DMA Data Transfer Ultra DMA data burst timing requirements

16 Ultra DMA data burst timing descriptions

17 (Initialing an Ultra DMA data-in burst) (Sustained Ultra DMA data-in burst)

18 (Device terminating an Ultra DMA data-in burst) (Host terminating an Ultra DMA data-in burst)

19 (Initialing an Ultra DMA data-out data burst) (Sustained Ultra DMA data-out burst)

2 Features:  Standard ATA/IDE Bus Interface - 512 Bytes / Sector - ATA comm- and set compatible  Capacities - Integral Z Series (MLC

20 (Host terminating an Ultra DMA data-out burst) (Device terminating an Ultra DMA data-out burst)

21 3.4 Power Management System Power Consumption: (Ta = 0 to 700C) Symbol Parameter Conditions

22 4.2 Command Sets Below table summarizes the PATA PCIe command set with the paragraphs that follow describing the individual commands and task fi

23 CY: Cylinder Low/High Register --: Not set up DR: Drive bit of Drive/Head register 4.3 Identify Drive Information The Ide

24 Word Address Default Value Total Bytes Data Field Type Information 57-58 Nnnnh 4 Current capacity in sectors (LBAs)(Word 57= LSW, Word 58= MSW)

25 5.0 Physical Dimension Top View Side & Bottom View Note: 1. Unit: mm General Tolerance: ± 0.1

26 6.0 Weight 1) 8 TSOP Flash: 10.2g 2) 4 TSOP Flash: 8.2g 3) 2 TSOP Flash: 7.2g 4) 1 TSOP Flash: 6.7g

3 TABLE OF CONTENTS 1.0 BLOCK DIAGRAM ...

4 1.0 Block Diagram 1.1 Capacity Specification Density Total Bytes Cylinders Heads Sectors 16GB 16,441,270,272 16383 16 63 32GB 32,279,224,320

5 2.0 Specification 2.1 Pin Assignments Pin Number Signal Pin Number Signal 1 HD0 2 HD15 3 HD1 4 GND 5 HD2 6 HD14 7 HD3 8 HD13 9 GND 10 HD12

6 33 NC 34 GND 35 GND 36 NC 37 HA0 38 NC 39 HA1 40 GND 41 HA2 42 IORDY 43 nIOIS16 44 INTRQ 45 nPDIAG 46 nHCS0 47 3V3 48 nHCS1 49 3V3 50 GND 51 3V3 5

7 as Device 0 or Device 1. 30 -DMACK(DMA acknowledge) I This signal is used by the host in respond to DMARQ to initiate DMA transfer. 44 INTRQ(Inter

8 3.0 Electrical Characteristics 3.1 Absolute Maximum Rating Item Symbol Parameter MIN MAX Unit 1 VDD-VSS DC Power Supply -0.3 +5.5 V 2 VIN In

9 3.3 AC Characteristics 3.3.1 PIO Data Transfer